Nvidia has quietly cut the published specifications of its flagship Vera Rubin AI GPUs — and nobody at the company announced it. The per-GPU HBM4 memory bandwidth listed on Nvidia's product pages fell from 22 terabytes per second to 19.2 TB/s, a drop of about 13 percent, while NVLink 6 interconnect bandwidth slipped from 3.6 TB/s to 3.0 TB/s, roughly 17 percent. The change was discovered not by Nvidia, but by readers comparing the company's current documentation with archived copies.

The revision first surfaced in a report from IT Home, which compared Nvidia's October product pages with a copy saved in June. Wccftech then narrowed the window using Wayback Machine snapshots, placing the edit between September 1 and September 11 — meaning the lower figures may have been live for more than a month before anyone noticed. Reports from ServeTheHome on October 31 and Hardware Busters on October 26 confirmed the same numbers.

The standard server board took the biggest hit

The configuration that fared worst is the HGX Rubin NVL8, the standard eight-GPU server board that most cloud providers and enterprises will actually rack. Its listed HBM4 capacity fell from 2.3 terabytes to 2 TB, and its aggregate memory bandwidth dropped from 176 TB/s to 130 TB/s — a cut of about 26 percent. At rack scale, the flagship Vera Rubin NVL72 slips from 1,580 TB/s of aggregate HBM4 bandwidth to 1,400 TB/s, with NVLink totals falling from 260 TB/s to 216 TB/s.

Not everything changed. Each Rubin GPU still carries 288 GB of HBM4 memory, and the headline compute figure of 50 petaflops of sparse NVFP4 inference is unchanged. But the numbers no longer reconcile neatly: the HGX page still shows the original 22 TB/s and 3.6 TB/s per-GPU figures next to the new, lower system totals, suggesting the server-board parts are configured differently from the NVL72 parts. Nvidia has not explained the discrepancy.

A quiet edit, not a delay — and a rival is watching

A Nvidia representative, quoted in a Wccftech report, said the earlier figures were preliminary targets from development, while the revised numbers are the specifications for systems in qualified, volume production — and that individual component specifications alone do not determine application performance. In other words, the revision replaces paper targets with a shipping-production yardstick, rather than marking a new chip generation. The hardware itself is not delayed: Vera Rubin racks are already running at partners including CoreWeave, Google Cloud and Microsoft Azure, with fall production shipments under way.

The timing still matters. The edit landed just as AMD launched its Instinct MI450X accelerator and claimed its MI455X beats Vera Rubin by 30 percent — a claim that looks stronger now that Nvidia's own published bandwidth figures have come down. The memory backdrop is tight, too: Samsung has said next year's HBM supply is already sold out, and reports relayed by TrendForce and ZDNet suggest the next Rubin Ultra variant is moving from 12-high HBM4E memory stacks to 8-high HBM4, a shift that would trade bandwidth for available supply.

For buyers, the practical question is whether the lower numbers change real-world performance — and Nvidia's answer, so far, is that they should not. The episode lands days before Nvidia reports third-quarter results on Tuesday, November 17, when investors will be watching for any sign that the memory squeeze is biting into the company's most important product line.

By Hamza Faisal